Policy Updates（August.10）

South Korea to Establish KRW 5tn Semiconductor Fund, Focusing on Materials, Components, and Fabless Companies

On August 10, Kang Hoon-sik, chief of South Korea’s presidential secretariat, said the country will establish a KRW 5tn (approximately USD 3.52bn) dedicated semiconductor fund, focusing on investments in promising chip materials, components, and fabless companies. The initiative forms part of the government’s plan to develop semiconductor industry clusters. In addition to the semiconductor fund, Kang announced that the government will provide KRW 5tn in trade financing to support export-oriented suppliers. The government will also seek to pass the Special Act on Mega-Scale Special Industrial Complexes within the year to accelerate permitting and approvals, environmental assessments, and infrastructure development in relevant areas.

Comments:South Korea’s establishment of a KRW 5tn dedicated semiconductor fund is another supporting measure for its plan to build the world’s largest semiconductor industry cluster. Unlike the previously announced KRW 800tn investment focused primarily on wafer manufacturing, the new fund explicitly targets materials, components, and fabless companies, aiming to strengthen weak links in the upstream supply chain and chip design segment—areas where South Korea remains relatively less competitive outside its strength in memory manufacturing. The parallel rollout of KRW 5tn in trade financing and the proposed Special Act on Mega-Scale Special Industrial Complexes is intended to remove obstacles to cluster development from both the financing and administrative-efficiency perspectives.

From an industry competition perspective, South Korea is advancing its semiconductor strategy with a full-supply-chain approach encompassing manufacturing capacity expansion + support for upstream materials and equipment + development of the chip design ecosystem. This multi-layered strategy creates systemic competitive pressure on China’s semiconductor industry. It not only risks widening the capacity gap in memory manufacturing, but also brings more direct competition in key areas of domestic substitution such as upstream materials and chip design. China’s semiconductor industry therefore needs to consolidate its existing strengths while closely monitoring South Korea’s support policies in materials, components, and other specialized segments, as well as their potential impact on the global semiconductor supply chain landscape.

02

Company Updates（August 11）

Amkor Reportedly Considering Sale of Partial Stake in the Chinese Mainland Business, Valuation Could Reach USD 1bn–1.5bn

According to Bloomberg, outsourced semiconductor assembly and test (OSAT) company Amkor is considering selling a partial stake in its China business. The company is working with advisers to conduct a preliminary assessment of a potential carve-out of its mainland China operations and sale of shares. People familiar with the matter said Amkor may retain a minority stake in the business, which could be valued at approximately USD 1bn–1.5bn. Amkor established a semiconductor packaging plant in Shanghai, China, in July 2001. In May 2004, it acquired IBM’s second-largest semiconductor facility in Shanghai, and in June 2016, it opened a MEMS packaging production line in China. Amkor has not yet made a final decision on the matter, and discussions remain at an early stage. People familiar with the matter said Asian investment firms and industry participants could be interested in the assets.

Comments:Amkor’s consideration of selling a partial stake in its mainland China business reflects the accelerating restructuring of the global semiconductor packaging and testing industry under mounting geopolitical pressure. As the world’s second-largest OSAT provider, Amkor has operated in mainland China for more than two decades, with its Shanghai facility serving as an important overseas packaging capacity base. The potential carve-out of its mainland China operations and introduction of Asian investors may be driven by two main factors. First, the continued tightening of U.S. semiconductor technology restrictions on China is raising both compliance costs and operating risks for companies with manufacturing operations in the country. Second, the rapid expansion of domestic packaging and testing capacity in the Chinese Mainland is eroding the competitive advantage of foreign OSAT providers in the low- to mid-end market.

From a transaction-structure perspective, Amkor’s reported plan to retain a minority stake rather than exit completely suggests that the company still wants to maintain a strategic presence in the Chinese market, while reducing geopolitical exposure through the introduction of local capital. If completed, the transaction could become a representative case of “localized equity restructuring” among foreign semiconductor packaging and testing companies. For China’s domestic OSAT industry, if Amkor’s Shanghai assets were acquired by local industrial capital or domestic packaging and testing companies, this could strengthen domestic control over advanced packaging capacity. At the same time, the industry should remain alert to the longer-term impact of a potential slowdown in technology transfer by foreign OSAT companies and the relocation of high-end packaging capacity out of China.

03

Company Updates（August.11）

Nvidia Partners with Six Wall Street Giants to Build USD 500bn Compute Financing Platform, Advancing the Assetization of AI Infrastructure

On August 11, Nvidia announced that it had signed a memorandum of understanding with six leading global financial institutions—Apollo, BlackRock, Blackstone, Brookfield, Goldman Sachs, and KKR—to jointly establish an independent compute financing platform aimed at gradually mobilizing more than USD 500bn in third-party capital for AI infrastructure investment. The platform is designed to transform Nvidia’s computing capacity and full-stack AI infrastructure into an investable asset class for global capital. Compute infrastructure can deliver lower cost per token, generate higher revenue, and offer a longer useful life. Combined with the extensive network of off-takers supported by the CUDA ecosystem, these characteristics give compute infrastructure investment attributes similar to those of traditional infrastructure assets. Through the platform, Nvidia aims to establish dedicated capital pools for customers at attractive financing rates, making Nvidia infrastructure more accessible to frontier AI labs, enterprises, governments, and cloud service providers, while offering large asset managers longer-duration investment opportunities linked to actual infrastructure utilization. Nvidia CEO Jensen Huang described the initiative as an important milestone in the company’s evolution from “building chips” to helping build “AI factories” as investable productive infrastructure. The cooperation remains subject to the execution of definitive agreements. Nvidia has not disclosed specific financial terms or the amount of investment commitments from each participating institution.

Comments:Nvidia’s partnership with six major Wall Street institutions to build a USD 500bn compute financing platform marks a shift in AI infrastructure competition from a “technology race” to a “capital race.” Packaging computing capacity into an investable asset class is, in essence, a “second battlefield” Nvidia is opening beyond chip sales. By mobilizing long-term third-party capital to provide financing support for customers, the model not only lowers the financial barrier to purchasing Nvidia infrastructure, but also helps lock in customer stickiness within the CUDA ecosystem for years to come. If the model proves successful, Nvidia could evolve from a “hardware company that sells chips” into an “architect and market maker for AI compute infrastructure,” with its competitive moat expanding from technological advantages into a broader capital ecosystem advantage.

From an industry trend perspective, global AI-related spending is expected to exceed USD 730bn this year, while major technology companies have broadly signaled that AI spending is unlikely to slow. Against this backdrop, the ability to connect scarce computing resources with long-term capital more efficiently is becoming a key competitive variable for the next stage of the AI infrastructure race. The participation of institutions such as Apollo and BlackRock indicates that Wall Street increasingly views AI compute as a critical infrastructure asset class comparable to data centers and fiber-optic networks. For China’s domestic AI industry, Nvidia’s move could further strengthen the capital barriers surrounding its ecosystem. In addition to catching up technologically, domestic compute providers will also need to consider how to build a dual-engine model driven by both “technology + capital” in order to address the increasingly capital-intensive nature of global AI infrastructure competition.

04

Company Updates（August.11）

TSMC CoWoS Yield Exceeds 99%, 5.5x Reticle-Size Version in Mass Production with 14x Reticle-Size Targeted for 2029

On August 11, He Jun, Vice President of Advanced Packaging Technology and Service at TSMC, said in a keynote speech at the OCP Asia Summit that as AI-driven compute demand continues to rise, advanced packaging technologies including 3D IC, CoWoS, and SoIC are rapidly evolving. TSMC’s 5.5x reticle-size CoWoS has already entered mass production, with yields consistently above 98% and some products even reaching 99%. He Jun said TSMC plans to maintain a cadence of introducing a new generation of CoWoS technology every year and expects to advance to a 14x reticle-size version by 2029. In SoIC hybrid bonding, a 6-micron hybrid bonding pitch has already entered high-volume production. TSMC expects to further reduce the pitch to 4.5 microns by 2029, while enabling A14-on-A14 stacking. He Jun emphasized that the future development of advanced packaging for AI will not be a technology race among individual companies, but rather a collaborative effort across the entire ecosystem, encompassing chips, packaging, materials, equipment, and system integration.

Comments:TSMC’s CoWoS yield exceeding 99% marks the transition of advanced packaging for AI chips from a “capacity ramp-up” phase into stable, high-yield mass production. Mass production of the 5.5x reticle-size version at yield levels of up to 99% indicates that TSMC has established significant engineering barriers in ultra-large-format packaging. For AI accelerators that often need to integrate multiple compute dies and more than ten HBM stacks, this is a critical prerequisite for ensuring both scalable capacity and manageable costs. Behind He Jun’s self-deprecating remark, “I’m the CoWoS guy,” is a broader shift in TSMC’s position in advanced packaging—from technological leadership toward greater industry influence.

From a technology roadmap perspective, TSMC’s plan to advance to 14x reticle-size CoWoS by 2029 and reduce the SoIC hybrid bonding pitch to 4.5 microns shows that advanced packaging is continuing to evolve toward larger package sizes and higher integration density. As package dimensions expand beyond the hundred-millimeter scale, the traditional sequential development model of “chip first, packaging later” is becoming increasingly unsustainable. System Technology Co-Optimization (STCO) is therefore emerging as an industry consensus. For China’s domestic advanced packaging industry, TSMC’s rapid iteration in CoWoS and SoIC is further widening the technology gap, but it also provides a clear roadmap for catching up. Accelerating breakthroughs in key process areas such as large-format packaging and hybrid bonding, while leveraging the substantial packaging demand from China’s domestic AI chip industry for process qualification and validation, will be essential to narrowing the gap.

05

Company Updates（August.11）

Ruike Huaxin Signs Project for Annual Production of 1bn Semiconductor Lead Frames, Accelerating Domestic Substitution of Key Packaging Materials

On August 11, a semiconductor lead frame project backed by Shanghai Ruike Huaxin Technology Co., Ltd., with planned annual production capacity of 1bn units, was officially signed and launched in South Taihu New Area. The project will be developed in three phases. The first two phases will mainly focus on etched lead frames. Phase I is scheduled to begin production in 2027, with annual output of 1bn units and a targeted annual production value of RMB 200mn. Phase II will expand capacity through the construction of its own plant, raising annual output to 4bn units and production value to RMB 800mn. At a later stage, the project will also expand into areas related to OLED and emerging display technologies. Lead frames are core structural materials used in semiconductor packaging, providing key functions including electrical interconnection between chips and external circuits, heat dissipation, and mechanical support. Their performance directly affects package reliability and signal integrity. As domestic semiconductor packaging capacity continues to expand, demand for the localization of high-end etched lead frames is becoming increasingly urgent. Ruike Huaxin’s large-scale investment is expected to provide key material support for China’s advanced packaging supply chain and reduce dependence on imported materials.

06

Market Updates（August.12）

Counterpoint: YMTC Rises to No. 3 Globally in Q2 NAND Shipments for First Time, Overtaking Kioxia with 14% Share

According to data released by Counterpoint Research on August 12, Yangtze Memory Technologies Co. (YMTC) climbed to third place globally in NAND flash shipments for the first time in the second quarter of 2026, capturing a 14% market share and narrowly overtaking Kioxia. Samsung maintained the lead with a 25% share, followed by SK Hynix at 22%, while Micron ranked fifth. YMTC’s shipments increased 22% YoY and 5% QoQ. The breakthrough was driven by the migration of AI workloads from training toward inference. In the second quarter of 2026, enterprise SSDs accounted for 48% of global NAND bit shipments, nearly double the 26% recorded in the same period last year.

However, YMTC’s shipment scale has not yet fully translated into revenue. As its product mix remains concentrated in consumer applications, with a relatively low share of higher-priced enterprise SSDs for data centers, the company ranked fifth in revenue in the second quarter, still trailing Micron and Kioxia. Counterpoint said YMTC has achieved mass production of 267-layer 3D NAND flash and is advancing R&D of technologies exceeding 300 layers based on its Xtacking architecture. The company plans to further shift its product mix toward enterprise SSDs in the second half of the year to consolidate its position as the world’s third-largest NAND supplier. Counterpoint expects server eSSDs to account for more than 50% of global NAND bit shipments by the end of this year.

07

Company Updates（August.13）

On August 11, Yuanjie Technology announced that it plans to invest in the construction of the Yuanjie Semiconductor Technology Industrial Park, with total investment of approximately RMB 4.268bn, including land transfer fees. The project will be located in Fengxi New City, Xixian New Area, Shaanxi Province, and will include laser chip production lines, manufacturing facilities, and supporting infrastructure. It is intended to address existing capacity bottlenecks and expand production capacity for high-end laser chips. The project will cover approximately 126 mu of land and is expected to have a construction period of 24 months. The proposal has been approved by the company’s board of directors but remains subject to approval by the shareholders’ meeting, as well as preliminary procedures including land-use approvals, project filing, and environmental impact assessment. Once completed, the project is expected to help the company capture market growth opportunities, meet steadily rising customer demand in areas such as data center construction, and improve the stability and responsiveness of order fulfillment. According to publicly available information, Yuanjie Technology is a domestic photonic chip company operating under an integrated device manufacturer (IDM) model, with capabilities spanning the entire value chain from chip design and epitaxial growth to wafer fabrication, packaging, and testing.